Chip Scale Packaging is generally defined in the industry as a single die package that is no larger than 1.2 times the die size. Chip Supply defines Chip Scale Packaging as the smallest possible package for a given die size. There are many different CSP formats in the marketplace today. Chip Supply presently offers a wire bond version on a BT (bismaleimide triazine) substrate. In the near future, Chip Supply will introduce a flip chip version of this product, and additional substrate materials. These packages are included in Chip Supply’s DieScale™ product line. We use an array of solder bumps, with the ball pitch designed as wide as possible to simplify test and next level assembly.

DieScale™ Description
DieScale™ consists of a die attached to an interposer and wire bonded out to metalized pads. The entire assembly is then transfer molded to form the package. The bottom side of the interposer has solder spheres attached to provide an electrical connection to the next assembly layer. See Fig. 1 for a description.

Figure 1

DieScale™ products are classified by the I/O count, solder sphere pitch, and height profile. For standard format products, I/O counts are available from 16 to 280. Solder ball pitches range from 0.5 mm to 1.27 mm. Height profiles include 1 mm, 1.2 mm and 1.4 mm, as measured from the top of the encapsulation to the bottom of the solder ball. The ultimate height is determined by the material set chosen to assemble the package.

DieScale™ Interposers
DieScale™ begins with an interposer, typically a high Tg material (like bismaleimide triazine, known as BT) or ceramic, with a two or four layer circuit design. The topside is designed with bond pads and, in cases where high heat dissipation is needed, a metalized land pad for the die. The bond pads are connected to the bottom side by drilled and plated via’s that connect to solder ball pads. Chip Supply offers standard format designs, or can customize designs for a given application. The choice of material for the interposer is based upon the application.

Diescale™ Assembly Processes
CSP products are generally built in a lead frame format, where many packages exist on the same substrate. This increases throughput by allowing many devices to be assembled in bulk. This also reduces cost by maximizing the usable area of the interposer. For instance, Chip Supply builds CSP’s on a 35 x 35-mm format. However, depending on the size of the package, an array of 4 to 49 individual packages can be located on the substrate. Upon completion of assembly, the devices are typically removed from the frame by using a substrate saw similar to that used for silicon wafers.

Assembly begins by attaching the die to the interposer with either a conductive or non-conductive epoxy. Non-conductive epoxy is the more prevalent method, as the area under the die is typically used to route the wire bonds in to vias that connect to the bottom side of the interposer. However, in cases where the die has a backside potential that must be connected to the circuit, the die can be conductive epoxy attached to a die pad (referred to as a flag).

After die attach, the die are then wire bonded to the interposer using either gold or aluminum wire. Wire bond profiles typically require that the wire bonds on the interposer be located as close to the die as possible (minimize the size of the package) and as low a profile as possible (reduce height).

The next process is to encapsulate the die and wire bonds. Encapsulation helps protect the wire bonds and die surface. There are two process used in encapsulating CSP’s. One method for encapsulating is dam and fill. This involves dispensing a dam material around the periphery of the area needing encapsulation. Dam material is typically a high viscosity material, which creates a “dam” for the fill material. The fill is the actual encapsulate, which is dispensed inside of the dam, and fills the area to the top of the dam. This process is typically time consuming and expensive. There are also coplanarity issues with the encapsulation itself, as well as the board. The stresses caused by the dam can warp the board, creating a potato chip across the package, making it harder to mount the device on the next layer board. Transfer molding is a high volume, cheaper process for encapsulating parts. The lead frame is placed in a mold designed to allow encapsulation to a specified area. Mold compound is then liquefied by heat and pressure, and transferred into the mold. The resulting encapsulation area is a well-defined flat surface, with very little warping of the board. Transfer molding is the preferred method for encapsulating CSP’s.

Once the package is encapsulated, the solder spheres are attached to the bottom side of the interposer and then the package marking is applied. Solder spheres come in a number of different sizes and compositions. The size of the sphere is based on the pitch of the device. Chip Supply offers a design guide that specifies a solder sphere size for a given pitch, however custom designs are available. The standard composition of a solder sphere is eutectic solder, although different compositions including lead free are available depending on the properties required by an application. The solder spheres are placed by first coating the land pads with a flux, which acts both as a paste to keep the solder spheres in place after placement, and as a stimulant for the solder to wet to the landing pad. Once the spheres are placed, the interposer is then reflowed at an optimized profile to bond the solder to the land pad. A cleaning process is often required after reflow to wash away residues from the flux.

Finally, the parts are ready to be singulated from the lead frame. A saw similar to a dicing saw for silicon wafers typically performs singulation. However, parts may be punched out of the lead frame in some applications. After singulation is complete, the parts are ready for the next process, which may include test, burn-in or shipment to the customer.

Products that have low thermal characteristics and require a lower cost are typically built on BT. BT has similar properties to FR-4, with the main difference being that BT has a higher glass transition temperature. This allows the product to withstand high temperature reflow process that occur during solder sphere attach and mounting of the part to the next layer board. Another benefit to BT is that it has a similar coefficient of thermal expansion Cte as that of FR-4 (17-19 ppm/degree C). If the intended main board is constructed of similar material the package and the main board will expand and contract at similar rates during temperature excursions, thus reducing the stress incurred by the solder sphere connection to both objects.

Ceramic is typically used when in applications with high power devices or extreme environments. Ceramic offers much better thermal dissipation characteristic than FR-4 type materials. Its moisture absorption and resistance to heat characteristic are better than FR-4 as well. However, ceramic is not as popular a material choice due to its cost and low TCE.
Benefits of Chip Scale Packaging

The benefits of Chip Scale Packaging include: